brAIn · true randomness, generated in hardware

Randomness isn't computed here. It's measured.

A memristor pulsed on the microsecond scale answers unrepeatably. LoMaRe's circuit turns that answer into a tunable distribution generator — the sampler that probabilistic compute has been imitating in software.

Every chip that needs randomness today fakes it. This one makes it.
One IP platform · four applications
True random number generation · edge AI · robotics · compute-in-memory AI inference acceleration.
01 · True random number generation

Every secure chip needs true randomness.

Keys, nonces and signatures are only ever as strong as the entropy behind them. brAIn is a drop-in hardware entropy source — the block that sits at the root of every secure chip. Certifiable against the standards buyers already demand (NIST SP 800-90B, AIS-31), in a standard chip process at room temperature, it integrates into secure elements, MCUs and HSMs — at orders of magnitude lower energy per bit than existing entropy circuits.

$4.2B TRNG MARKET 2026 → $7.6B BY 2030 · SECURE ELEMENTS · MCUs · HSMs · AUTOMOTIVE · IoT SoCs
No seed to steal, no formula to break — unpredictable by construction.
02 · Edge AI

In uncontrolled environments, uncertainty is the workload.

Confidence costs compute, so most edge devices skip it — and act on guesses they cannot grade. Modern policies generate each action by sampling, step by step; that sampling is exactly what brAIn does natively — accelerated, not emulated. Knowing when it does not know becomes affordable: many more possibilities per watt, or the same accuracy on a fraction of the power.

$20B EDGE-AI CHIP MARKET 2026 → $40B BY 2030 · ~18% CAGR
~10 femtojoules per sample — orders of magnitude below software.
03 · Robotics

Weigh thousands of possibilities — on a power budget.

A robot in a field or a human space cannot be pre-programmed. Working out where it is, it tracks thousands of possible positions at once from noisy sensors, every cycle. Deciding what to do next, it tests thousands of candidate moves per second to pick one that will not hit anything. With brAIn every one of those possibilities is a device, not an arithmetic workload — more options explored in the same budget, better choices in clutter.

memristor current · stress / sense pulses · fig. 2B
ROBOTICS · AUTONOMY STACK · HUMANOID & INDUSTRIAL COMPUTE PLATFORMS
Knowing when it does not know becomes affordable — which is what makes a machine in a human space safe.
04 · Compute-in-memory AI inference acceleration

Probabilistic inference, accelerated in memory.

Edge to datacenter: a compute-in-memory architecture with randomness and compute in a single array runs sampling-bound AI natively — Monte-Carlo, Bayesian and generative sampling, not emulated — at a fraction of a GPU's energy. It targets the memory-bound decode stage of inference, where the industry runs memory-light accelerators, and is delivered as licensable IP or silicon (PCIe accelerator cards).

y(n) = x(n) − x(n−1) · threshold t(n) · bit stream
I/V · sense current → voltage
A(z) · Σ⁻ · B(z) · delay, subtract, shape
C(z) · D(z) · feedback sets the threshold t(n)
$20.5B AI INFERENCE CHIP MARKET 2026 → $37.0B BY 2030 · QUANT DESKS · NATIONAL LABS · PHARMA · CLOUD AI
Monte-Carlo, Bayesian and generative sampling — native, not emulated.
05 · The distribution

A distribution you can dial.

The feedback parameters set the mean and the variance of the output. Three parameter sets, three distributions, one device — and no arithmetic anywhere in the loop. This is the distribution the analogue belief accumulates from, produced by physics.

set Aset Bset Clive: —
FIG. 8 · OUTPUT HISTOGRAM · 250 000 PULSES PER PARAMETER SET
Calibrated, not just random — shaped to the probability a machine needs.
Datacenter & scientific computing
Monte-Carlo risk grids, MC-heavy scientific HPC, Bayesian ML — sampling-bound workloads at a fraction of a GPU's energy.
06 · Decision

The physics samples. The host only gets an interrupt.

Samples never leave the analogue domain — the posterior accumulates in analogue, not in registers. A comparator at femtojoule class crosses the boundary once per decision — 256 to 1,000 samples — not once per sample. The digital domain is unchanged: host compute reads the belief, sets a policy, takes an interrupt; the imaging chain wakes only when the belief crosses.

1 decision ≈ 256 – 1,000 samples → 1 interruptanalogue posterior accumulator · femtojoule comparator · host compute unchanged
AI is now limited by power. We hand it back.
Datacenter & scientific computing
Compute-in-memory inference: randomness and compute in a single array — edge to datacenter, as licensable IP or silicon.
Heat spreaderlid
Host computedigital · unchanged · reads belief · interrupt
Conditioning · calibrationanalogue posterior accumulator · A(z) B(z) C(z) D(z)
1T1R sampler arrayM memristive generators
Substratepulse source · I/O
Vpulse · SW₁stress / sense
RMmemristor
R₁sense → I/V
I/V
A(z)
Σ⁻x(n) − x(n−1)
B(z)
t(n) ⊳ bit
C(z) · D(z)feedback
p(β)output histogram
pulses 0
bits 0
P(1) 0.50
ȳ 0.000 · σ 0.000
STRESS · SENSE · COMPARE
scroll to open
The whole architecture

Two domains. One boundary. Crossed once per decision.

brAIn keeps a live probabilistic belief about the world in the analogue domain, ahead of the converter — and hands the digital side one interrupt per decision, not one per sample.

Analogue domain — the belief is maintained here

Sensor tap

Binned analogue signal, ahead of the converter.

→

brAIn

Sampler array · conditioning · calibration · analogue posterior accumulator.

→

Decision

A comparator, at femtojoule class.

Samples never leave this domain — the posterior accumulates in analogue, not in registers.
Digital domain — unchanged

Host compute

MCU · CPU · GPU · NPU · DSP. Reads belief, sets a policy, takes an interrupt.

Imaging chain / inference engine

Wakes only when the belief crosses the boundary.

live: samples this decision 0 · next boundary at — · decisions 0
The boundary is crossed once per decision — 256 to 1,000 samples — not once per sample. That is the whole architecture.
Applications

Where it matters.

One IP platform, three applications — the same primitive that secures a key can weigh a robot's next move and run sampling-bound inference without the energy bill.

Why it matters

Sampling isn't the bottleneck. Simulating it is.

Probabilistic workloads are expensive on conventional hardware because randomness has to be manufactured — a PRNG, floating-point arithmetic and memory traffic for every sample. A memristor pulsed on the microsecond scale answers unrepeatably; brAIn calibrates that physical randomness into a controllable sampling operation, so the posterior can be accumulated by physics instead of computed by logic.

Because the belief lives in analogue, always-on sensing costs what a pulse costs — microwatts, continuous — and the expensive digital stages stay asleep until a decision is actually due. The digital host is untouched: it receives a belief and an interrupt, and runs whatever model it already runs.

Origin
Imperial College London, EEE
Intellectual property
Patent pending in US, EPO and CN
Peer review
IEEE Trans. Circuits & Systems I
Validation
Measured on physical devices · 250k-pulse datasets

Building an always-on sensing product?

Talk to us about brAIn — evaluation, licensing, or a joint development programme.

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