LoMaRe builds solid-state silicon that draws probability — and memory — directly from device physics. The belief is maintained in analogue; the digital domain is unchanged. Alongside: ultra-low-power PMRAM memory and SiMO near-infrared photodetection, all CMOS-compatible.
Samples never leave the analogue domain — the posterior accumulates in analogue, not in registers. The boundary is crossed once per decision — 256 to 1,000 samples — not once per sample. That is the whole architecture. Everything below is computed by a circuit simulation this page is running right now.
The sensor is tapped in the analogue domain and the sampler array is pulsed against it. A stress pulse deforms the memristor; a sense read measures what it became — unrepeatable on the microsecond scale. Physics is the sampler.
Conditioning subtracts the previous read so drift cancels and the randomness survives; calibration holds the distribution where it is set; the analogue posterior accumulator integrates the evidence. No sample is ever digitised.
A comparator crosses the boundary once per decision — every 256 to 1,000 samples. Host compute (MCU · CPU · GPU · NPU · DSP) is unchanged: it reads the belief, sets a policy, takes an interrupt. The imaging chain or inference engine wakes only when the belief crosses.
Two distinct device physics: a stochastic memristive sampler that keeps a belief in analogue, and a deterministic multiferroic memory. Both slot into existing CMOS manufacturing and win on energy and cost. Each technology carries its own applications.
Sampler array · conditioning · calibration · analogue posterior accumulator · a femtojoule comparator. The belief lives in analogue; the host only takes an interrupt. Security & cryptography · robotics & physical AI · datacenter & scientific computing.
Open brAIn →High-speed two-terminal multiferroic memory, 50+ patents. Sub-0.1 pJ/bit, non-destructive read, deterministic switching, stable to 150 °C, scalable to 6 nm.
Explore PMRAM →Silicon–metal-oxide near-infrared photodetection at 1000–1800 nm — a low-cost, CMOS-compatible alternative to III-V / InGaAs detectors. LiDAR, high-speed data links and chip interconnects — in a manufacturability study with CPI (UK) toward TRL6.
Explore SiMO →
PMRAM figures from our own characterisation, caveats intact.
Electric-field switching, transient current only — no steady current.
Sub-nanosecond achievable in simulation.
Estimated; 10⁸–10⁹ measured to date, roadmap to 10¹⁵.
Industrial and automotive high-temperature stability.
Finite-element analysis; no anisotropy-driven heating.
PMRAM alone; 10+ more on SiMO photodetection.
Probabilistic workloads are expensive on conventional hardware for one reason: randomness has to be manufactured — a PRNG, floating-point arithmetic and memory traffic spent producing each sample, imitating something physics does for free.
Memory devices are already stochastic. LoMaRe's patented primitive calibrates that physical randomness into a controllable sampling operation — so probability becomes a native quantity in silicon. The same materials science yields our memory, our photodetectors and our sensors.
Founded as a spin-off from Imperial College London (Company No. 10723076), in partnership with Imperial Innovations.
Awarded for PMRAM memory chip design. Completed.
Awarded for flexible near-infrared photodetectors. On-going.
Study with the Centre for Process Innovation (CPI), Durham, toward TRL6 and large-area yield.
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